Computer Science Tutorial

Word addressable vs Bytes addressable memory

Word Addressable

      A memory word is certain bytes that bidirectional data bus can carry at a time. Say, size of the data bus is 16 bits, it means it can carry a maximum of 16 bits of data at a time. In such case we can say that word size is 2 bytes. And such a technique is caled word addressable memory. In a 32 bit machine, size of the data bus is 32 bits or 4 bytes. So, a 32 bit machine has word size of 4 bytes. In such machine cpu can read write 4 bytes of data at a time from main memory. A reference to address 0 will read/write first 4 bytes of main memory that is bytes 0 to bytes 3. Similarly, address 1 will fetch bytes 4-7 and so on.

Note : In a system where size of the data bus is just 8 bits that is 1 byte. It becomes byte addressable.

Byte Addressable

Byte addressable technique is simple, cpu just fetches 1 byte at a time from main memory irrespective of the size of the data bus. Address 0 denotes bytes 0, address 1 denotes bytes 1 and so on. Earlier computers like intel 8008 were byte addressable. Intel 8085 was also byte addressable having word size of 8 bits.

In first figure we can see there are 128 bytes in the ram, so ram size is 128 bytes. But, in second figure there are 128 words in the ram and each word has a size of 32 bits or 4 bytes, which makes total size of ram equal to (128 * 8) * 4 = 512 bytes. In word addressable cpu accesses 4 bytes at a time using 32 bits bidirectinal data bus but in byte addressable size of the data bus is 8 bits.

In computers byte addressable technique is used only to read from memoey, that is, it was not used to write into memory. Cpu fetches 8 bits data from memory and stores it in 8 bit register MBR.
In word addressable we need two registers Memory address register(MAR) and Memory data register(MDR). The size of these register depends upon the computer architecture. Say, we take an example of 32 bit machine having 4 GB RAM. In this case the size of MAR and MDR are 32 bit and same is the size of the data bus. When cpu is on to fetch any data or instruction from memory, it places the 32 bit memory address into MAR. This address is then used to calculate the address of memory word in main memory. Since, the size of memoey word is 4 bytes. A 4 GB ram will have 1 GB memory words and to address 1 GB memory words in the main memory we need only 30 bits. So, two higher order bits of 32 bit memory address are generally discarded to make it a 30 bit address and placed in the MAR. Using this 30 bit address a certain memory word is chosen. Address 0 points to first memory word that is bytes 0-3, address 1 points second word that is, bytes 4-7 and so on. After the respective memory word is fetched it is placed in the data bus and gets stored in the MDR. Now, cpu can work on this data.

In byte addressable two different cpu registers are used Program Counter(PC) and Memory Buffer Register(MBR). If we consider the same ram size of 4 GB(a byte addressable memory generally does not have such huge memory). 32 bits will be required to address 2^32 bytes ram. So, size of the PC will be 32 bits. When cpu will fetch any data from ram it will plave 32 bits address in the PC, this 32 bit address will be required to address a certain byte in the memory. Address 0 will point to bytes 0, address 1 will point to bytes 1 and so on. After the required byte is fetched it will be placed on to the data bus to store in the lower order 8 bits of MBR.
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